# Samsung and Intel turn Hot Chips into a memory and packaging showdown Source: TechNewsList (https://technewslist.com) Canonical URL: https://technewslist.com/en/article/samsung-intel-hot-chips-memory-packaging-showdown-2026-08-24-night Section: Hardware (https://technewslist.com/en/hardware) Author: TechNewsList Language: en Published: 2026-08-24T17:20:57.97+00:00 Updated: 2026-08-24T17:20:58.143905+00:00 > Hot Chips 2026 is showing that the next AI hardware battle is not just about the accelerator. It is about where memory sits, how it is packaged, and how much power the stack burns. ## TL;DR - Samsung says its zHBM roadmap could deliver far higher bandwidth and efficiency than conventional HBM stacks. - TrendForce reports zHBM claims a 70% power-efficiency gain and 230% greater DRAM bandwidth versus HBM4e. - Intel EMIB keeps showing up as a serious advanced-packaging option in the same conversation. ## Key points - The hardware battle is shifting from chip bragging rights to system-level thermal and bandwidth constraints. - Memory placement is becoming as strategic as accelerator design. - Intel's packaging approach matters because customers want scale without the cost of fragile interposers. - Samsung is trying to move the debate toward 3D memory architectures and shorter data paths. - The next proof is how these ideas translate into real customer platforms. # Samsung and Intel turn Hot Chips into a memory and packaging showdown Hot Chips 2026 is proving that the real AI hardware fight is not limited to the chip vendors everyone already knows. It is also a fight over memory placement, advanced packaging, bandwidth, thermal behavior, and the physical distance data has to travel before a model can use it. Samsung's latest zHBM and zNAND-O messaging, paired with Intel's EMIB packaging story, makes that especially obvious. ## What happened Samsung used FMS 2026 to unveil its vision for next-generation 3D memory, including concept models for zHBM and zNAND-O. The company says zHBM vertically stacks memory directly above AI accelerators, shortening the path data has to travel and reducing the bottlenecks that conventional side-by-side layouts create. ![TrendForce graphic comparing Samsung and SK hynix at Hot Chips 2026](https://img.trendforce.com/blog/wp-content/uploads/2026/08/24120905/Samsung-vs.-SK-hynix-at-HotChips-819x1024.jpg) *TrendForce's Hot Chips coverage shows how memory architecture and packaging are moving to the center of the AI hardware discussion.* TrendForce's Hot Chips 2026 reporting adds the sharper market angle. According to the outlet, Samsung described zHBM as delivering a 70% gain in power efficiency and 230% more DRAM bandwidth than a standard HBM4e stack. SK hynix, meanwhile, was reported to be evaluating Intel EMIB as part of its packaging discussion. That is not a random pairing. It shows how the memory ecosystem is converging on the same hard question: how do you move more data, faster, without turning the datacenter into a heat problem? The answer is increasingly about architecture, not just component specs. ## Why it matters This matters because AI hardware constraints are becoming physical long before they are theoretical. Operators can buy faster chips, but if the system cannot feed those chips, cool them, or package them efficiently, the deployment economics fall apart. Samsung's zHBM pitch is valuable because it changes the conversation from "how much memory" to "where the memory lives." That is a much more mature debate. It implies the industry is now optimizing around distance, power, and stack geometry rather than only around raw capacity. Intel's EMIB keeps surfacing for the same reason. Advanced packaging is not glamorous, but it is one of the cheapest ways to create scale without forcing every design into the same expensive mold. If customers want wide packages, better yields, and practical thermal behavior, packaging suddenly becomes a strategic differentiator. ## Technical details Samsung's zHBM concept is about 3D memory architecture. Instead of placing HBM beside the accelerator, it places the memory above it, reducing the physical path between logic and memory. Samsung says the approach improves bandwidth and power efficiency, and it has been positioned as part of a broader roadmap that also includes HBM4E, HBM5, LPDDR5X-PIM, and next-generation NAND. That matters because modern AI workloads are often limited by memory bandwidth and data movement. A stack that can move data more efficiently can raise utilization across the whole system, not just at the chip level. Intel EMIB is part of a different but related answer. By embedding silicon bridges directly into the substrate, EMIB gives designers a way to connect multiple dies without relying entirely on a traditional interposer. That can lower complexity and cost while still enabling tight integration. For large AI packages, that balance is critical. ## Market / industry impact The market impact is that memory and packaging are no longer back-office concerns. They are front-line strategic levers in AI infrastructure. Vendors that can demonstrate better power efficiency and packaging flexibility may gain leverage even if their raw compute story is not the loudest. This also raises the value of supply-chain relationships. If Samsung, SK hynix, Intel, and other players keep pushing different answers to the same scaling problem, the customers who buy these systems will have more choices but also more integration complexity. That complexity is why the category matters to investors and operators. The AI race is no longer only a silicon race. It is a thermal, packaging, and memory-system race too. ## What to watch next Watch whether Samsung turns zHBM from a concept into a product roadmap with customer-facing milestones. The more concrete the timeline, the more credible the claim. Also watch whether Intel EMIB keeps appearing in packaging discussions outside Intel's own ecosystem. That would confirm it is becoming a broader industry option rather than just an Intel story. Finally, watch for real system benchmarks that show whether the claimed efficiency gains survive production deployment. The market will reward the winner that can convert architecture into stable, repeatable performance. ## Sources - [Samsung Semiconductor News](https://semiconductor.samsung.com/news-events/news/samsung-unveils-next-gen-3d-memory-vision-at-fms-2026-charting-the-future-of-ai-infrastructure/) - Official announcement of zHBM and zNAND-O concepts. - [TrendForce](https://www.trendforce.com/news/2026/08/24/news-hot-chips-2026-samsungs-zhbm-claims-70-power-efficiency-gain-sk-hynix-evaluates-intel-emib/) - Reports the Hot Chips 2026 claims and the Intel EMIB angle. - [Samsung Tech Blog](https://semiconductor.samsung.com/news-events/tech-blog/samsung-presents-its-vision-for-next-generation-ai-infrastructure-with-3d-memory-architecture-at-fms-2026/) - Explains the 3D memory architecture and bandwidth rationale. Mentions: Samsung Semiconductor, Intel, SK hynix, zHBM, EMIB, Hot Chips 2026 ## Sources - [Samsung Semiconductor News](https://semiconductor.samsung.com/news-events/news/samsung-unveils-next-gen-3d-memory-vision-at-fms-2026-charting-the-future-of-ai-infrastructure/) - [TrendForce](https://www.trendforce.com/news/2026/08/24/news-hot-chips-2026-samsungs-zhbm-claims-70-power-efficiency-gain-sk-hynix-evaluates-intel-emib/) - [Samsung Tech Blog](https://semiconductor.samsung.com/news-events/tech-blog/samsung-presents-its-vision-for-next-generation-ai-infrastructure-with-3d-memory-architecture-at-fms-2026/)