# Huawei Accelerates Ascend 960 AI Roadmap and Unveils Atlas 960E SuperPoD with Near-Packaged Optics

Source: TechNewsList (https://technewslist.com)
Canonical URL: https://technewslist.com/en/article/huawei-unveils-ascend-960-roadmap-and-atlas-960e-2026-09-20-night
Section: Hardware (https://technewslist.com/en/hardware)
Author: TechNewsList
Language: en
Published: 2026-09-20T17:19:04.569+00:00
Updated: 2026-09-20T17:19:04.747834+00:00

> At Huawei Connect 2026 in Shanghai, Huawei bifurcates the Ascend 960 line into dedicated training and inference silicon and introduces the Atlas 960E SuperPoD delivering 8 EFLOPS of FP8 compute with Near-Packaged Optics.

## TL;DR
- Huawei announced a strategic bifurcation of its upcoming Ascend 960 AI chip series during Huawei Connect 2026 in Shanghai.
- The lineup divides into the Ascend 960 for large foundation model pre-training and the Ascend 960B for high-throughput inference.
- Huawei unveiled the Atlas 960E SuperPoD cluster capable of scaling to 8,192 unified accelerators delivering 8 EFLOPS of FP8 compute.
- Hardware teams integrated Near-Packaged Optics and an upgraded HCCS interconnect to bypass memory bandwidth bottlenecks.

## Key points
- Deputy Chairman Eric Xu confirmed that specialized inference requirements necessitated separating training and serving hardware architectures.
- The training-focused Ascend 960 integrates next-generation High Bandwidth Memory providing up to 4.8 terabytes per second of memory bandwidth.
- The Atlas 960E SuperPoD introduces direct liquid cooling and photonic switching, cutting cluster communication latencies by 42 percent.
- Huawei reported that over 40 Chinese enterprise cloud platforms and state research institutes have committed to pilot deployments.
- The semiconductor roadmap demonstrates Huawei's continued strategy of utilizing advanced 2.5D packaging to offset advanced lithography restrictions.

## What happened

At the annual Huawei Connect 2026 conference in Shanghai, concluding on September 20, 2026, Chinese telecommunications and enterprise hardware titan Huawei revealed a significant architectural overhaul of its flagship artificial intelligence semiconductor roadmap. Speaking before thousands of enterprise partners and cloud architects, Rotating Chairman Eric Xu announced that Huawei is splitting its next-generation Ascend 960 series into two specialized silicon platforms: the Ascend 960 dedicated to large foundation model training, and the Ascend 960B engineered specifically for low-latency inference workloads.

Alongside the chip roadmap updates, Huawei demonstrated the Atlas 960E SuperPoD, an exascale modular AI supercomputing system designed to interconnect thousands of Ascend processors into a unified compute fabric. The flagship SuperPoD rack configuration scales up to 8,192 accelerator nodes, delivering an aggregate 8 exaFLOPS of 8-bit floating-point (FP8) compute capability.

The announcement represents Huawei's most ambitious hardware undertaking to date as it seeks to supply domestic hyperscalers, sovereign enterprise clouds, and academic laboratories with a complete alternative to Western accelerator ecosystems.

![Enterprise microprocessor die floorplan layout illustrating multi-core execution pipelines and high-bandwidth memory caches](https://rkhynbcsbnkkcwgexzwg.supabase.co/storage/v1/object/public/media/api/1789924733512-dk2vnu-huawei-unveils-ascend-960-roadmap-and-atlas-960e-2026-09-20-night-inside-1-9f68998389.webp)
*Semiconductor architecture evolution: Bifurcated training and inference silicon optimizes matrix execution pipelines for high-throughput AI.*

## Why it matters

Global export restrictions have heavily constrained Chinese semiconductor foundries from acquiring cutting-edge extreme ultraviolet (EUV) lithography scanners. Consequently, domestic chip designers cannot simply rely on transistor shrinking to achieve generational performance leaps. Huawei's strategy with the Ascend 960 series demonstrates how advanced packaging, architectural specialization, and optical networking can compensate for lithography constraints.

By splitting the product line into separate training and inference dies, Huawei maximizes silicon area efficiency. Training models with hundreds of billions of parameters requires immense matrix math density and massive High Bandwidth Memory (HBM) capacity. Conversely, commercial inference serving prioritizes memory bandwidth, sparse matrix operations, and cost-effective thermal dissipation. Customizing the silicon for each workload prevents wasting precious die area on unused functional blocks.

Furthermore, the Atlas 960E SuperPoD addresses the critical networking bottleneck that limits massive multi-node clusters. When training frontier foundation models across thousands of accelerators, network communication latency often degrades overall cluster efficiency. Huawei's native optical interconnect architecture allows domestic cloud providers to scale compute clusters horizontally while maintaining near-linear scaling efficiency.

## Technical details

The training-oriented Ascend 960 is constructed using an advanced multi-chiplet 2.5D packaging architecture, stacking multiple compute dies alongside high-density memory modules on a custom silicon interposer. Memory bandwidth is rated at up to 4.8 terabytes per second, supported by Huawei's proprietary memory management controllers that dynamically schedule tensor allocations across local high-bandwidth caches.

The Atlas 960E SuperPoD marks the commercial debut of Near-Packaged Optics (NPO) within Huawei's compute lineup. By placing optical transceiver engines directly adjacent to the compute packaging rather than routing signals through long copper traces to peripheral pluggable modules, the system reduces signal attenuation and cuts interconnect energy consumption by 35 percent.

![High-performance computing cluster server racks illustrating dense multi-node interconnects and liquid cooling infrastructure](https://rkhynbcsbnkkcwgexzwg.supabase.co/storage/v1/object/public/media/api/1789924735611-xu8mz8-huawei-unveils-ascend-960-roadmap-and-atlas-960e-2026-09-20-night-inside-2-8076cea1e8.webp)
*Exascale AI cluster infrastructure: Optical interconnect fabrics deliver low-latency scale-up networking across thousands of accelerator nodes.*

Inter-node communication is governed by the fourth-generation Huawei Cache Coherent System (HCCS 4.0), providing full hardware cache coherency across 128 directly connected accelerator sockets before transitioning to the optical fabric. Software developers interface with the hardware via Huawei's CANN 8.0 (Compute Architecture for Neural Networks) development suite, which introduces automated kernel fusion and drop-in compilation support for PyTorch models.

## Market / industry impact

The introduction of the Ascend 960 and Atlas 960E SuperPoD solidifies Huawei's dominant position as the primary supplier of high-performance artificial intelligence infrastructure across mainland China. With access to leading-edge Nvidia and AMD accelerators restricted by trade controls, domestic cloud providers—including Baidu, Tencent, and China Mobile—are increasingly standardizing their data center expansions around the Ascend hardware and CANN software ecosystem.

The bifurcated product strategy also positions Huawei to capture a larger share of the fast-growing enterprise inference market. As organizations move from experimental model training to live customer-facing deployments, demand for cost-effective, high-throughput inference silicon has skyrocketed. The Ascend 960B is priced aggressively to compete directly against domestic competitors such as Biren Technology and Moore Threads.

From a global supply chain perspective, Huawei's reliance on domestic packaging foundries and optical component manufacturers is catalyzing rapid technological advancement throughout China's sovereign semiconductor ecosystem, driving commercial investment into local substrate fabrication and photonics packaging.

## What to watch next

Huawei executives stated that initial sampling of the Ascend 960 and 960B silicon will begin with select tier-one cloud partners in early 2027, with volume commercial availability planned for the second half of the year. Production ramp rates will serve as a critical barometer for domestic foundry packaging yields.

Software ecosystem maturity remains the primary hurdle for widespread adoption. While CANN 8.0 offers improved framework compatibility, enterprise developers will closely evaluate operator coverage and automated performance tuning tools compared to Nvidia's industry-standard CUDA software environment.

Finally, international trade regulators are expected to monitor the commercialization of Huawei's Near-Packaged Optics modules, as western policymakers continuously reassess export definitions covering advanced packaging equipment and optical interconnect components.

## Sources

- [Huawei Connect 2026 Keynote Presentation](https://www.huawei.com/en/events/huawei-connect/2026/ascend-960-atlas-superpod) — Official keynote transcripts from Deputy Chairman Eric Xu detailing Ascend 960 microarchitecture, CANN software updates, and SuperPoD specs.

- [Tom's Hardware Semiconductor Analysis](https://www.tomshardware.com/pc-components/cpus/huawei-splits-ascend-960-ai-accelerator-family-unveils-8-eflops-superpod) — Technical architectural breakdown evaluating memory bandwidth scaling, Near-Packaged Optics integration, and cluster scale-out limits.

- [South China Morning Post Technology Desk](https://www.scmp.com/tech/big-tech/article/3279182/huawei-unveils-next-gen-ascend-ai-chips-supercomputing-pod-shanghai) — Analysis of domestic cloud provider adoption, wafer packaging yields, and geopolitical trade sanctions resilience in mainland China.

Mentions: Huawei, Eric Xu, Ascend 960, Atlas 960E, Huawei Connect 2026

## Sources
- [Huawei Connect 2026 Keynote Presentation](https://www.huawei.com/en/events/huawei-connect/2026/ascend-960-atlas-superpod)
- [Tom's Hardware Semiconductor Analysis](https://www.tomshardware.com/pc-components/cpus/huawei-splits-ascend-960-ai-accelerator-family-unveils-8-eflops-superpod)
- [South China Morning Post Technology Desk](https://www.scmp.com/tech/big-tech/article/3279182/huawei-unveils-next-gen-ascend-ai-chips-supercomputing-pod-shanghai)