# GlobalFoundries and TSMC Ink $2 Billion Multiyear Deal to Produce CoWoS Silicon Interposers in New York

Source: TechNewsList (https://technewslist.com)
Canonical URL: https://technewslist.com/en/article/globalfoundries-tsmc-sign-2bn-cowos-silicon-interposers-2026-10-10-morning
Section: Hardware (https://technewslist.com/en/hardware)
Author: TechNewsList
Language: en
Published: 2026-10-10T05:29:33.053+00:00
Updated: 2026-10-10T05:29:33.248332+00:00

> GlobalFoundries and TSMC established a $2 billion manufacturing agreement to fabricate advanced silicon interposers with embedded deep trench capacitors at GlobalFoundries' Malta, New York campus, securing onshore packaging capacity for AI accelerators.

## TL;DR
- GlobalFoundries and TSMC signed a $2 billion five-year deal for silicon interposer manufacturing in New York.
- The partnership marks the first high-volume onshore United States supply source for TSMC's CoWoS ecosystem.
- Manufactured interposers will feature embedded deep trench capacitor technology to stabilize AI accelerator power.
- Commercial volume production is scheduled to begin ramping at the Malta, New York facility in early 2028.

## Key points
- Alleviates severe global bottlenecks in 2.5D advanced packaging for hyperscale AI processors and accelerators.
- Expands domestic semiconductor fabrication beyond front-end logic into critical multi-die integration components.
- Embedded deep trench capacitors deliver superior power delivery integrity compared to traditional external capacitors.
- TSMC retains proprietary packaging assembly while diversifying passive silicon substrate fabrication domestically.
- Includes commercial frameworks to scale production capacity further as enterprise generative AI demand expands.

## What happened

In October 2026, leading specialty semiconductor foundry GlobalFoundries and global foundry powerhouse Taiwan Semiconductor Manufacturing Company announced a landmark two billion dollar, five-year manufacturing agreement. Under the strategic pact, GlobalFoundries will expand dedicated wafer fabrication capacity at its Fab 8 manufacturing campus in Malta, New York, to fabricate silicon interposers for TSMC's proprietary Chip-on-Wafer-on-Substrate (CoWoS) advanced packaging ecosystem.

The collaboration represents an unprecedented alliance between two of the world's most prominent pure-play foundries. Silicon interposers are critical 2.5D substrate platforms that bridge ultra-dense logic dies—such as graphic processing units, tensor processing units, and custom AI accelerators—with multiple stacks of High Bandwidth Memory (HBM). By routing millions of microscopic interconnect wires across fractions of a millimeter, interposers provide the massive memory bandwidth essential for modern artificial intelligence training and inference workloads.

According to GlobalFoundries chief executive officer Thomas Caulfield and TSMC executive leadership, the agreement marks the establishment of the first high-volume onshore United States manufacturing source for silicon interposers. Commercial production is slated to commence ramping during the first half of 2028, with contractual provisions permitting scalable capacity expansions as industry demand for artificial intelligence hardware intensifies.

## Why it matters

Over the past three years, the primary physical bottleneck constraining global artificial intelligence hardware shipments has not been front-end logic wafer fabrication, but back-end advanced packaging capacity. While leading fabless chip designers could secure wafer allocations on cutting-edge three-nanometer and two-nanometer nodes, finished accelerator modules faced severe delays waiting for CoWoS packaging slots in Taiwanese cleanrooms.

![TSMC advanced semiconductor manufacturing and wafer packaging facility construction site in the United States](https://rkhynbcsbnkkcwgexzwg.supabase.co/storage/v1/object/public/media/api/1791610159936-f7j9lv-globalfoundries-tsmc-sign-2bn-cowos-silicon-interposers-2026-10-10-morning-inside-1-da6b4c5e47.webp "TSMC advanced semiconductor manufacturing and wafer packaging facility construction site in the United States.")

This geographical concentration created acute geopolitical and supply chain vulnerabilities for Western technology hyperscalers. An interruption in Taiwanese advanced packaging could paralyze global data center server deployments. By establishing secondary silicon interposer production at GlobalFoundries' established facility in upstate New York, TSMC and GlobalFoundries are effectively regionalizing a vital component of the artificial intelligence supply chain.

Furthermore, the partnership optimizes capital allocation across the semiconductor industry. Silicon interposers do not require leading-edge extreme ultraviolet lithography; instead, they are fabricated on mature 65-nanometer and 45-nanometer manufacturing nodes where GlobalFoundries possesses deep manufacturing expertise, high yields, and substantial cleanroom footprint. This allows TSMC to reserve its specialized Taiwanese packaging lines for final die bonding and advanced testing while sourcing passive interposer substrates domestically in the United States.

## Technical details

The technological centerpiece of the agreement is the integration of GlobalFoundries' proprietary embedded deep trench capacitor (eDTC) architecture directly into the passive silicon interposers. Modern hyperscale artificial intelligence accelerators consume between seven hundred and twelve hundred watts of electric power, generating extreme transient voltage fluctuations during rapid transitions between idle states and heavy matrix multiplication bursts.

Conventional packaging approaches place discrete surface-mount capacitors alongside the interposer or on the organic package substrate. However, the physical distance between external capacitors and the active logic die introduces parasitic inductance, limiting voltage regulation responsiveness. GlobalFoundries' eDTC process etches millions of vertical microscopic trenches directly into the silicon substrate, embedding massive capacitance densities directly beneath the logic chiplets and HBM stacks.

![300mm (12-inch) silicon wafer processed for advanced multi-die packaging, interposers, and high-density interconnects](https://rkhynbcsbnkkcwgexzwg.supabase.co/storage/v1/object/public/media/api/1791610168499-f0cy2b-globalfoundries-tsmc-sign-2bn-cowos-silicon-interposers-2026-10-10-morning-inside-2-eec64caf7e.webp "300mm (12-inch) silicon wafer processed for advanced multi-die packaging, interposers, and high-density interconnects.")

This embedded architecture cuts power distribution network impedance by over sixty percent, substantially reducing voltage droop during heavy computing spikes. By stabilizing power delivery directly at the chiplet interface, accelerators utilizing these New York-fabricated interposers can sustain higher boost frequencies, optimize thermal efficiency, and minimize power supply throttling across enterprise AI server clusters.

## Market / industry impact

The announcement was met with widespread enthusiasm across Wall Street and the semiconductor industry, sending shares of GlobalFoundries sharply higher. For GlobalFoundries, securing a multi-year, multi-billion-dollar commitment from TSMC validates its strategic focus on differentiated feature-rich manufacturing rather than capital-intensive front-end node shrinkage.

For major semiconductor customers including Nvidia, AMD, Apple, and Qualcomm, the deal provides a concrete roadmap toward domestic multi-chiplet assembly. As TSMC completes its Fab 21 logic fabrication facility in Phoenix, Arizona, having silicon interposers manufactured in New York creates the missing structural link necessary to build a self-sustaining North American advanced packaging corridor.

Policymakers in Washington also lauded the agreement as a validation of federal industrial policy under the CHIPS and Science Act. Building resilient domestic supply chains requires securing not just front-end logic fabrication, but every intermediate layer of multi-die integration. Establishing onshore interposer manufacturing closes one of the most glaring vulnerabilities in the domestic semiconductor ecosystem.

## What to watch next

Over the next twenty-four months, equipment installation and tool qualification schedules at the Malta, New York fab will serve as critical execution benchmarks. Industry analysts will watch for cleanroom retrofitting progress, deep reactive ion etching tool installations, and wafer yield milestones leading up to the targeted 2028 production ramp.

Market observers will also scrutinize whether TSMC announces complementary domestic packaging investments. While GlobalFoundries will produce the silicon interposers in New York, the subsequent step of micro-bump bonding logic dies to the interposer currently requires shipping wafers back to Taiwan or partner packaging facilities. Observers will track whether TSMC accelerates plans for dedicated CoWoS assembly cleanrooms adjacent to its Arizona fab.

Finally, the success of this collaboration may spur additional cross-foundry partnerships across the global chip industry. As manufacturing complexity surges and the economics of standalone multi-billion-dollar fabs strain single corporate balance sheets, cooperative production models between specialized foundries will increasingly define the future of high-performance semiconductor manufacturing.

## Sources

- [GlobeNewswire GlobalFoundries Release](https://www.globenewswire.com/news-release/2026/10/08/2960241/0/en/GlobalFoundries-and-TSMC-Announce-2-Billion-Multiyear-Agreement-to-Produce-Silicon-Interposers-in-the-United-States.html) - Official joint press release detailing $2 billion five-year CoWoS interposer manufacturing agreement at Malta, New York fab.
- [Tom's Hardware](https://www.tomshardware.com/pc-components/cpus/globalfoundries-and-tsmc-sign-dollar2-billion-advanced-packaging-deal-for-malta-ny-fab) - Semiconductor industry analysis on embedded deep trench capacitors, CoWoS supply constraints, and 2028 production timeline.
- [Data Center Dynamics](https://www.datacenterdynamics.com/en/news/globalfoundries-tsmc-ink-2bn-silicon-interposer-deal-for-ai-packaging/) - Detailed assessment of domestic packaging capacity for hyperscale AI accelerators and high-bandwidth memory integration.

Mentions: GlobalFoundries, TSMC, Thomas Caulfield, C.C. Wei, CoWoS

## Sources
- [GlobeNewswire GlobalFoundries Release](https://www.globenewswire.com/news-release/2026/10/08/2960241/0/en/GlobalFoundries-and-TSMC-Announce-2-Billion-Multiyear-Agreement-to-Produce-Silicon-Interposers-in-the-United-States.html)
- [Tom's Hardware](https://www.tomshardware.com/pc-components/cpus/globalfoundries-and-tsmc-sign-dollar2-billion-advanced-packaging-deal-for-malta-ny-fab)
- [Data Center Dynamics](https://www.datacenterdynamics.com/en/news/globalfoundries-tsmc-ink-2bn-silicon-interposer-deal-for-ai-packaging/)